Chapter 3/ Hardware Briefing

Wondershare

The general-purpose registers (AX, BX, CX, and DX) can store numeric

operands or address values. They also have special purposes listed in

Table 3.2. The indexing registers (SI and DI) are also used to implement

indexed addressing, in addition to string and mathematical operations.

The FLAGS register is used to indicate the status of CPU or results of certain

operations. Of the 16 bits that make up the FLAGS register, only 9 are used.

For our purposes, there are just two bits in the FLAGS register that we're

really interested in: the trap flag (TF; bit 8) and the interrupt enable flag (IF;

bit 9).

If TF is set (i.e., equal to 1), the processor generates a single-step interrupt

after each instruction. Debuggers use this feature to single-step through a

program. It can also be used to check and see if a debugger is running.

If the IF is set, interrupts are acknowledged and acted on as they are received

(I'll cover interrupts later).

Windows still ships with a 16-bit machine code debugger, aptly named

debug.exe. It's a bare-bones tool that you can use in the field to see what a

Table 3,2 Real-Mode Registers

Register

Purpose

CS

Stores the base address of the current executing code segment

DS

Stores the base address of a segment containing giobal program data

SS

Stores the base address of the stack segment

ES

Stores the base address of a segment used to hold string data

FS&GS

Store the base address of other global data segments

IP

Instruction pointer, the offset of the next instruction to execute

SP

Stack pointer, the offset of the top-of-stack (TOS) byte

BP

Used to build stack frames for function calls

AX

Accumulator register, used for arithmetic

BX

Base register, used as an index to address memory indirectly

CX

Counter register, often a loop index

DX

Data register, used for arithmetic with the AX register

SI

Pointer to source offset address for string operations

DI

Pointer to destination offset address for string operations

66 I Part I