Chapter 3/ Hardware Briefing

CS High Byte

CS Low Byte

IP High Byte

IP Low Byte

CS High Byte

CS Low Byte

IP High Byte

IP Low Byte

CS High Byte

CS Low Byte

IP High Byte

IP Low Byte

INT 0x02

Address 0x00008

INT 0x01

Address 0x00004

INT 0x00

Address 0x00000

Figure 3.7

Under MS-DOS, the BIOS handles interrupts 0 through 31, and DOS handles

interrupts 32 through 63 (the entire DOS system call interface is essentially a

series of interrupts). The remaining interrupts (64 to 255) are for user-defined

interrupts.

See Table 3.3 for a sample listing of BIOS interrupts. Certain portions of this

list can vary depending on the BIOS vendor and chipset. Keep in mind, this is

in real mode. The significance of certain interrupts and the mapping of inter¬

rupt numbers to ISRs will differ in protected mode.

All told, there are three types of interrupts:

■ Hardware interrupts (maskable and nonmaskable).

■ Software interrupts.

■ Exceptions (faults, traps, and aborts).

Hardware interrupts (also known as external interrupts) are generated by

external devices and tend to be unanticipated. Hardware interrupts can be

maskable or nonmaskable. A maskable interrupt can be disabled by clearing

the IF, via the CLI instruction. Interrupts 8 (system timer) and 9 (keyboard)

arc good examples of maskable hardware interrupts. A nonmaskable interrupt

cannot be disabled; the processor must always act on this type of interrupt.

Interrupt 2 is an example of a nonmaskable hardware interrupt

68 I Part I