Chapter 3/ Hardware Briefing

Software interrupts (also known as internal interrupts) arc implemented in a

program using the INT instruction. Ttie INT instruction takes a single integer

operand, which specifics the interrupt vector to invoke. For example, the fol¬

lowing snippet of assembly code invokes a DOS system call, via an interrupt,

to display the letter �4 on the screen.

MOV AH.OZH

MOV DL,41H

INT 21H

The INT instruction pcrfonns the following actions:

■ Clears the trap flag (TF) and interrupt enable flag (IF).

■ Pushes the FLAGS, CS, and IP registers onto the stack (in that order).

■ Jumps to the address of the ISR specified by the specified interrupt vector.

■ Executes code until it rcaches an I RET instruction.

The I RET instruction is the inverse of INT. It pops off the IP, CS, and FLAGS

values into their respective registers (in this order), and program execution

continues to the instruction following the INT operation.

Exceptions are generated when the processor detects an error while executing

an instruction. There are three kinds of exceptions:traps� and aborts.

They differ in terms of how they are reported and how the instruction thai

generated the exception is restarted.

When a fault occurs, the processor reports the exception at the instruction

boundary preceding the instruction that generated the exception. Thus, the

state of the program can be reset to the state that existed before the excep¬

tion so that the instruction can be restarted. Interrupt 0 (divide by zero) is an

example of a fault.

When a trap occurs, no instruction restart is possible. The processor reports

the exception at the instruction boundary following the instruction that gener¬

ated the exception. Interrupt 3 (breakpoint) and interrupt 4 (overflow) are

examples of faults.

Aborts are hopeless. When an abort occurs, the program cannot be restarted,

period.

Segmentation and Program Control

Real mode uses segmentation to manage memory. This introduces a certain

degree of addidonal complexity as far as the instruction set is concerned be-

70 I Part I