3.4 Protected Mode

consisting of multiple fields that's used to index an entry in a table. This table

entry, known as a segment descriptor, describes a segment in linear address

space. (If this isn't clear, don't worry. We'll get into the details later on.) For

now, just understand that we're no longer in Kansas. Because we're working

with a much larger address space, these registers can't hold segment address¬

es in physical memory,

Table 3.7 Protected-Mode Registers

Register

Purpose

CS

Stores the segment descriptor oi the current executing code segment

DS-GS

Store the segment descriptors of program data segments

SS

Stores the segment descriptor oi the stack segment

EIP

Instruction pointer, the linear address offset of the next instruction to

execute

ESP

Stack pointer, the linear address offset of the top-of-stack (TOS) byte

EBP

Used to build stack frames for function calls

EAX

Accumulator register, used for arithmetic

EBX

Base register, used as an index to address memory indirectly

ECX

Counter register, often a loop index

EDX

I/O pointer

ESI

Points to a linear address in the segment indicated by the DS register

EDI

Points to a linear address in the segment indicated by the ES register

One thing to keep in mind is that, of the six segment registers, the CS register

is the only one that cannot be set explicitly. Instead, the CS register's contents

must be set implicidy through instructions that transfer program control (e.g.,

JMP, CALL, INT, RET, IRET, SYSENTER, SYSEXIT, etc.),

The general-purpose registers (EAX, EBX, ECX, and EDX) are merely extended

32-bit versions of their 16-bit ancestors. In fact, you can still reference the old

registers and their subregisters to access lower-order bytes in the extended

registers. For example, AX references the lower-order word of the EAX register.

You can also reference the high and low bytes of AX using the AH and AL iden¬

tifiers, This is the market requirement for backwards compatibility at play.

The same sort of relationship exists with regard to the pointer and indexing

registers. They have the same basic purpose as their real-mode predeces¬

sors, They hold the effective address portion of a logical address, which in

Part I I 89