IB Chapter 3/Hardware Briefing

GDT

Logical Address

Segment Selector

Effective Address

(not used)

Bit 47

GDTR

Segment Descriptor

Call Gate

Descriptor

Offset Address

Segment Selector

Segment Descriptor

Segment Descriptor

Segment Descriptor

Code Segment

Descriptor

Procedure Entry Point

Code Segment

Base Address

Segment Descriptor

Segment Descriptor

16 15

GDT Base Linear Address

GDT Size Limit

Figure 3.24

Bit 31 16

15

14 13

12 8

7 5

4 0

Offset bits 31:16

P

DPL

0 D 1 1 0

0 0 0

Ignored

r

Interrupt Descriptor j

}

Bit31 16

15

0

1

1

1

Segment Selector

Offset bits 15:0

IDT

Descriptor 255

Descriptor 254

Descriptor 5

Interrupt Gate

Descriptor 3

Descriptor 2

Descriptor

Descriptor 0

Bit 47

16 15

Relevant Interrupt-Gate Descriptor Fields

DPL Privilege level required by the

caller to invoke the ISR

Offset Offset address to the interrupt

handling procedure

P Segment present flag (normally

always 1, e.g., present)

D Size of the values pushed on the

stack (1 = 32-bit, 0 = 16-bit)

0

IDTR

IDT Base Address

IDT Size Limit

Figure 3.25

Part I