1984

Verilog

Most computer languages describe how to assemble bits in a computer’s memory—for example, the arrangement of instructions in a computer’s memory in the case of C, or elements of text on a page in the case of HTML.

Hardware description languages (HDLs), in contrast, describe the arrangement of wires, resistors, and transistors that make up electronic circuits. A hardware designer writes the HDL “program” with a text editor. The program is then translated into a circuit diagram and eventually into a layout, which is used to create a chip mask and eventually an integrated circuit.

In the early 1980s, the development of very-large-scale integration (VLSI)—microelectronics with staggering numbers of tiny transistors—necessitated the creation of a new kind of HDL that could represent not just wiring diagrams, but more complicated structures such as clocks, registers, state machines, and complex behaviors. In addition to a layout and semiconductor mask, tools were needed that could simulate the HDL design before burning it into silicon. These tools, called simulators, could run an HDL design on a conventional computer. Although simulators ran designs much slower than the final silicon and were not always accurate (especially for large circuits), it was much faster—and cheaper—to test designs in simulation, rather than creating potentially buggy silicon.

Verilog was one of the first successful languages that allowed designers to create, simulate, test, and eventually produce running silicon for complex circuit designs. Gateway Design Automation created the Verilog language and its first simulator; the company then licensed the language to other companies that wanted to make Verilog tools.

Verilog’s primary competitor is VHDL (VHSIC Hardware Description Language), developed in 1987 by the US Department of Defense. VHDL is more restrictive and pedantic than Verilog, resulting in circuit design programs that are typically larger and harder to write, but that have a higher chance of being correct—that is, the simulated circuit matches the behavior of the actual circuit. Available for use without a license, VHDL was widely adopted. In 1989, Cadence Design Systems acquired Verilog, and then responded to the threat of VHDL by releasing Verilog into the public domain—making the language dramatically more popular and allowing it to be standardized as IEEE Standard 1364.

A 37-line Verilog program that describes a simple electronic circuit.