Interrupts are an alternative to polling. Once an external device has new data, it triggers an event in a processor called an interrupt. As its name suggests, it interrupts the normal workflow of executing instructions. The processor saves its current state and starts executing instructions from a different address until it encounters the return from an interrupt instruction. Then, it reads the saved state to continue executing the instruction stream from the moment it was interrupted. This alternative sequence of instructions is called an Interrupt Service Routine (ISR).
Each processor defines its own set of instructions and conventions to work with interrupts; however, all of them use the same general approach while dealing with interrupts:
- Interrupts are identified by numbers, starting with 0. The numbers are mapped to the hardware interrupt request lines (IRQ) that physically correspond to specific processor pins.
- When an IRQ line is activated, the processor uses its number as an offset in the interrupt vector array to locate the address of the interrupt service routine. The interrupt vector array is stored in memory on a fixed address.
- Developers can define or redefine ISRs by updating the entries in the interrupt vector arrays.
- A processor can be programmed to enable or disable interrupts, either for specific IRQ lines or all interrupts at once. When interrupts are disabled, the processor does not invoke the corresponding ISRs, although the status of the IRQ lines can be read.
- IRQ lines can be programmed to trigger interrupts, depending on the signal on the physical pin. This can be at the low level of the signal, the high level of the signal, or the edge (which is a transition from low to high or high to low).