FPGA Prototyping by VHDL Examples by Chu, Pong P. -- Read -- Imperial Library of Trantor

Index

Cover Title Page Copyright Dedication Preface Acknowledgments PART I: BASIC DIGITAL CIRCUITS

Chapter 1: Gate-level combinational circuit

1.1 Introduction 1.2 General description 1.3 Structural description 1.4 Testbench 1.5 Bibliographic notes 1.6 Suggested experiments

Chapter 2: Overview of FPGA and EDA software

2.1 Introduction 2.2 FPGA 2.3 Overview of the Digilent S3 board 2.4 Development flow 2.5 Overview of the Xilinx ISE project navigator 2.6 Short tutorial on ISE project navigator 2.7 Short tutorial on the ModelSim HDL simulator 2.8 Bibliographic notes 2.9 Suggested experiments

Chapter 3: RT-Ievel combinational circuit

3.1 Introduction 3.2 RT-level components 3.3 Routing circuit with concurrent assignment statements 3.4 Modeling with a process 3.5 Routing circuit with if and case statements 3.6 Constants and generics 3.7 Design examples 3.8 Bibliographic notes 3.9 Suggested experiments

Chapter 4: Regular Sequential Circuit

4.1 Introduction 4.2 HDL code of the FF and register 4.3 Simple design examples 4.4 Testbench for sequential circuits 4.5 Case study 4.6 Bibliographic notes 4.7 Suggested experiments

Chapter 5: FSM

5.1 Introduction 5.2 FSM code development 5.3 Design examples 5.4 Bibliographic notes 5.5 Suggested experiments

Chapter 6: FSMD

6.1 Introduction 6.2 Code development of an FSMD 6.3 Design examples 6.4 Bibliographic notes 6.5 Suggested experiments

PART II I/O MODULES

Chapter 7: UART

7.1 Introduction 7.2 DART receiving subsystem 7.3 DART transmitting subsystem 7.4 Overall DART system 7.5 Customizing a DART 7.6 Bibliographic notes 7.7 Suggested experiments

Chapter 8: PS2 Keyboard

8.1 Introduction 8.2 PS2 receiving subsystem 8.3 PS2 keyboard scan code 8.4 PS2 keyboard interface circuit 8.5 Bibliographic notes 8.6 Suggested experiments

Chapter 9: PS2 Mouse

9.1 Introduction 9.2 PS2 mouse protocol 9.3 PS2 transmitting subsystem 9.4 Bidirectional PS2 interface 9.5 PS2 mouse interface 9.6 Bibliographic notes 9.7 Suggested experiments

Chapter 10: External SRAM

10.1 Introduction 10.2 Specification of the IS61LV25616AL SRAM 10.3 Basic memory controller 10.4 A safe design 10.5 More aggressive design 10.6 Bibliographic notes 10.7 Suggested experiments

Chapter 11: Xilinx Spartan-3 Specific Memory

11.1 Introduction 11.2 Embedded memory of Spartan-3 device 11.3 Method to incorporate memory modules 11.4 HDL templates for memory inference 11.5 Bibliographic notes 11.6 Suggested experiments

Chapter 12: VGA controller I: graphic

12.1 Introduction 12.2 VGA synchronization 12.3 Overview of the pixel generation circuit 12.4 Graphic generation with an object-mapped scheme 12.5 Graphic generation with a bit-mapped scheme 12.6 Bibliographic notes 12.7 Suggested experiments

Chapter 13: VGA controller II: text

13.1 Introduction 13.2 Text generation 13.3 Full-screen text display 13.4 The complete pong game 13.5 Bibliographic notes 13.6 Suggested experiments

PART III PICOBLAZE MICROCONTROLLER XILINX SPECIFIC

Chapter 14: PicoBlaze Overview

14.1 Introduction 14.2 Customized hardware and customized software 14.3 Overview of PicoBlaze 14.4 Development flow 14.5 Instruction set 14.6 Assembler directives 14.7 Bibliographic notes

Chapter 15: PicoBlaze Assembly Code Development

15.1 Introduction 15.2 Useful code segments 15.3 Subroutine development 15.4 Program development 15.5 Processing of the assembly code 15.6 Syntheses with PicoBlaze 15.7 Bibliographic notes 15.8 Suggested experiments

Chapter 16: PicoBlaze I/O Interface

16.1 Introduction 16.2 Output port 16.3 Input port 16.4 Square program with a switch and seven-segment LED display interface 16.5 Square program with a combinational multiplier and DART console 16.6 Bibliographic notes 16.7 Suggested experiments

Chapter 17: PicoBlaze Interrupt Interface

17.1 Introduction 17.2 Interrupt handling in PicoBlaze 17.3 External interface 17.4 Software development considerations 17.5 Design example 17.6 Bibliographic notes 17.7 Suggested experiments

Appendix A: Sample VHDL templates

A.l General VHDL constructs A.2 Combinational circuits A.3 Memory Components A.4 Regular sequential circuits A.5 FSM A.6 FSMD A.7 S3 board constraint file (83. lief)

References Topic Index