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Index
Write Great Code, Volume 1
Acknowledgments
1. What You Need to Know to Write Great Code
1.1 The Write Great Code Series
1.2 What This Volume Covers
1.3 Assumptions This Volume Makes
1.4 Characteristics of Great Code
1.5 The Environment for This Volume
1.6 For More Information
2. Numeric Representation
2.1 What Is a Number?
2.2 Numbering Systems
2.2.1 The Decimal Positional Numbering System
2.2.2 Radix (Base)
2.2.3 The Binary Numbering System
2.2.3.1 Converting Between Decimal and Binary Representation
2.2.3.2 Making Binary Numbers Easier to Read
2.2.3.3 Binary Representation in Programming Languages
2.2.4 The Hexadecimal Numbering System
2.2.4.1 Hexadecimal Representation in Programming Languages
2.2.4.2 Converting Between Hexadecimal and Binary Representations
2.2.5 The Octal (Base-8) Numbering System
2.2.5.1 Octal Representation in Programming Languages
2.2.5.2 Converting Between Octal and Binary Representation
2.3 Numeric/String Conversions
2.4 Internal Numeric Representation
2.4.1 Bits
2.4.2 Bit Strings
2.5 Signed and Unsigned Numbers
2.6 Some Useful Properties of Binary Numbers
2.7 Sign Extension, Zero Extension, and Contraction
2.8 Saturation
2.9 Binary-Coded Decimal (BCD) Representation
2.10 Fixed-Point Representation
2.11 Scaled Numeric Formats
2.12 Rational Representation
2.13 For More Information
3. Binary Arithmetic and Bit Operations
3.1 Arithmetic Operations on Binary and Hexadecimal Numbers
3.1.1 Adding Binary Values
3.1.2 Subtracting Binary Values
3.1.3 Multiplying Binary Values
3.1.4 Dividing Binary Values
3.2 Logical Operations on Bits
3.3 Logical Operations on Binary Numbers and Bit Strings
3.4 Useful Bit Operations
3.4.1 Testing Bits in a Bit String Using AND
3.4.2 Testing a Set of Bits for Zero/Not Zero Using AND
3.4.3 Comparing a Set of Bits Within a Binary String
3.4.4 Creating Modulo-n Counters Using AND
3.5 Shifts and Rotates
3.6 Bit Fields and Packed Data
3.7 Packing and Unpacking Data
3.8 For More Information
4. Floating-Point Representation
4.1 Introduction to Floating-Point Arithmetic
4.2 IEEE Floating-Point Formats
4.2.1 Single-Precision Floating-Point Format
4.2.2 Double-Precision Floating-Point Format
4.2.3 Extended-Precision Floating-Point Format
4.3 Normalization and Denormalized Values
4.4 Rounding
4.5 Special Floating-Point Values
4.6 Floating-Point Exceptions
4.7 Floating-Point Operations
4.7.1 Floating-Point Representation
4.7.2 Floating-Point Addition and Subtraction
4.7.3 Floating-Point Multiplication and Division
4.7.3.1 Floating-Point Multiplication
4.7.3.2 Floating-Point Division
4.8 For More Information
5. Character Representation
5.1 Character Data
5.1.1 The ASCII Character Set
5.1.2 The EBCDIC Character Set
5.1.3 Double-Byte Character Sets
5.1.4 The Unicode Character Set
5.2 Character Strings
5.2.1 Character String Formats
5.2.1.1 Zero-Terminated Strings
5.2.1.2 Length-Prefixed Strings
5.2.1.3 Seven-Bit Strings
5.2.1.4 HLA Strings
5.2.1.5 Descriptor-Based Strings
5.2.2 Types of Strings: Static, Pseudo-Dynamic, and Dynamic
5.2.2.1 Static Strings
5.2.2.2 Pseudo-Dynamic Strings
5.2.2.3 Dynamic Strings
5.2.3 Reference Counting for Strings
5.2.4 Delphi/Kylix Strings
5.2.5 Creating Your Own String Formats
5.3 Character Sets
5.3.1 Powerset Representation of Character Sets
5.3.2 List Representation of Character Sets
5.4 Designing Your Own Character Set
5.4.1 Designing an Efficient Character Set
5.4.2 Grouping the Character Codes for Numeric Digits
5.4.3 Grouping Alphabetic Characters
5.4.4 Comparing Alphabetic Characters
5.4.5 Other Character Groupings
5.5 For More Information
6. Memory Organization and Access
6.1 The Basic System Components
6.1.1 The System Bus
6.1.1.1 The Data Bus
6.1.2 The Address Bus
6.1.3 The Control Bus
6.2 Physical Organization of Memory
6.2.1 8-Bit Data Buses
6.2.2 16-Bit Data Buses
6.2.3 32-Bit Data Buses
6.2.4 64-Bit Buses
6.2.5 Small Accesses on Non-80x86 Processors
6.3 Big Endian Versus Little Endian Organization
6.4 The System Clock
6.4.1 Memory Access and the System Clock
6.4.2 Wait States
6.4.3 Cache Memory
6.5 CPU Memory Access
6.5.1 The Direct Memory Addressing Mode
6.5.2 The Indirect Addressing Mode
6.5.3 The Indexed Addressing Mode
6.5.4 The Scaled Indexed Addressing Modes
6.6 For More Information
7. Composite Data Types and Memory Objects
7.1 Pointer Types
7.1.1 Pointer Implementation
7.1.2 Pointers and Dynamic Memory Allocation
7.1.3 Pointer Operations and Pointer Arithmetic
7.1.3.1 Adding an Integer to a Pointer
7.1.3.2 Subtracting an Integer from a Pointer
7.1.3.3 Subtracting a Pointer from a Pointer
7.1.3.4 Comparing Pointers
7.2 Arrays
7.2.1 Array Declarations
7.2.2 Array Representation in Memory
7.2.3 Accessing Elements of an Array
7.2.4 Multidimensional Arrays
7.2.4.1 Row-Major Ordering
7.2.4.2 Column-Major Ordering
7.2.4.3 Declaring Multidimensional Arrays
7.2.4.4 Accessing Elements of a Multidimensional Array
7.3 Records/Structures
7.3.1 Records in Pascal/Delphi
7.3.2 Records in C/C++
7.3.3 Records in HLA
7.3.4 Memory Storage of Records
7.4 Discriminant Unions
7.4.1 Unions in C/C++
7.4.2 Unions in Pascal/Delphi/Kylix
7.4.3 Unions in HLA
7.4.4 Memory Storage of Unions
7.4.5 Other Uses of Unions
7.5 For More Information
8. Boolean Logic and Digital Design
8.1 Boolean Algebra
8.1.1 The Boolean Operators
8.1.2 Boolean Postulates
8.1.3 Boolean Operator Precedence
8.2 Boolean Functions and Truth Tables
8.3 Function Numbers
8.4 Algebraic Manipulation of Boolean Expressions
8.5 Canonical Forms
8.5.1 Sum of Minterms Canonical Form and Truth Tables
8.5.2 Deriving the Sum of Minterms Canonical Form Algebraically
8.5.3 Product of Maxterms Canonical Form
8.6 Simplification of Boolean Functions
8.7 What Does This Have to Do with Computers, Anyway?
8.7.1 Correspondence Between Electronic Circuits and Boolean Functions
8.7.2 Combinatorial Circuits
8.7.2.1 Addition Circuits
8.7.2.2 Seven-Segment LED Decoders
8.7.2.3 Decoding Memory Addresses
8.7.2.4 Decoding Machine Instructions
8.7.3 Sequential and Clocked Logic
8.7.3.1 The Set/Reset Flip-Flop
8.7.3.2 The D Flip-Flop
8.8 For More Information
9. CPU Architecture
9.1 Basic CPU Design
9.2 Decoding and Executing Instructions: Random Logic Versus Microcode
9.3 Executing Instructions, Step by Step
9.3.1 The mov Instruction
9.3.2 The add Instruction
9.3.3 The jnz Instruction
9.3.4 The loop Instruction
9.4 Parallelism — The Key to Faster Processing
9.4.1 The Prefetch Queue
9.4.1.1 Saving Fetched Bytes
9.4.1.2 Using Unused Bus Cycles
9.4.1.3 Overlapping Instructions
9.4.1.4 Summary of Background Prefetch Events
9.4.2 Conditions That Hinder the Performance of the Prefetch Queue
9.4.3 Pipelining — Overlapping the Execution of Multiple Instructions
9.4.3.1 A Typical Pipeline
9.4.3.2 Stalls in a Pipeline
9.4.4 Instruction Caches — Providing Multiple Paths to Memory
9.4.5 Pipeline Hazards
9.4.6 Superscalar Operation — Executing Instructions in Parallel
9.4.7 Out-of-Order Execution
9.4.8 Register Renaming
9.4.9 Very Long Instruction Word (VLIW) Architecture
9.4.10 Parallel Processing
9.4.11 Multiprocessing
9.5 For More Information
10. Instruction Set Architecture
10.1 The Importance of the Design of the Instruction Set
10.2 Basic Instruction Design Goals
10.2.1 Choosing Opcode Length
10.2.2 Planning for the Future
10.2.3 Choosing Instructions
10.2.4 Assigning Opcodes to Instructions
10.3 The Y86 Hypothetical Processor
10.3.1 Y86 Limitations
10.3.2 Y86 Instructions
10.3.2.1 The mov Instruction
10.3.2.2 Arithmetic and Logical Instructions
10.3.2.3 Control Transfer Instructions
10.3.2.4 Miscellaneous Instructions
10.3.3 Addressing Modes on the Y86
10.3.4 Encoding Y86 Instructions
10.3.4.1 Eight Generic Y86 Instructions
10.3.4.2 Using the Special Expansion Opcode
10.3.5 Examples of Encoding Y86 Instructions
10.3.5.1 The add Instruction
10.3.5.2 The mov Instruction
10.3.5.3 The not Instruction
10.3.5.4 The Jump Instructions
10.3.5.5 The Zero-Operand Instructions
10.3.6 Extending the Y86 Instruction Set
10.4 Encoding 80x86 Instructions
10.4.1 Encoding Instruction Operands
10.4.2 Encoding the add Instruction — Some Examples
10.4.3 Encoding Immediate Operands
10.4.4 Encoding 8-, 16-, and 32-Bit Operands
10.4.5 Alternate Encodings for Instructions
10.5 Implications of Instruction Set Design to the Programmer
10.6 For More Information
11. Memory Architecture and Organization
11.1 The Memory Hierarchy
11.2 How the Memory Hierarchy Operates
11.3 Relative Performance of Memory Subsystems
11.4 Cache Architecture
11.4.1 Direct-Mapped Cache
11.4.2 Fully Associative Cache
11.4.3 n-Way Set Associative Cache
11.4.4 Matching the Caching Scheme to the Type of Data Access
11.4.5 Cache Line Replacement Policies
11.4.6 Writing Data to Memory
11.4.7 Cache Use and Software
11.5 Virtual Memory, Protection, and Paging
11.6 Thrashing
11.7 NUMA and Peripheral Devices
11.8 Writing Software That Is Cognizant of the Memory Hierarchy
11.9 Run-Time Memory Organization
11.9.1 Static and Dynamic Objects, Binding, and Lifetime
11.9.2 The Code, Read-Only, and Constant Sections
11.9.3 The Static Variables Section
11.9.4 The Uninitialized Storage (BSS) Section
11.9.5 The Stack Section
11.9.6 The Heap Section and Dynamic Memory Allocation
11.9.6.1 Memory Allocation
11.9.6.2 Garbage Collection
11.9.6.3 The OS and Memory Allocation
11.9.6.4 Heap Memory Overhead
11.10 For More Information
12. Input and Output (I/O)
12.1 Connecting a CPU to the Outside World
12.2 Other Ways to Connect Ports to the System
12.3 I/O Mechanisms
12.3.1 Memory-Mapped I/O
12.3.2 I/O and the Cache
12.3.3 I/O-Mapped Input/Output
12.3.4 Direct Memory Access (DMA)
12.4 I/O Speed Hierarchy
12.5 System Buses and Data Transfer Rates
12.5.1 Performance of the PCI Bus
12.5.2 Performance of the ISA Bus
12.5.3 The AGP Bus
12.6 Buffering
12.7 Handshaking
12.8 Time-outs on an I/O Port
12.9 Interrupts and Polled I/O
12.10 Protected Mode Operation and Device Drivers
12.10.1 Device Drivers
12.10.2 Communicating with Device Drivers and “Files”
12.11 Exploring Specific PC Peripheral Devices
12.12 The Keyboard
12.13 The Standard PC Parallel Port
12.14 Serial Ports
12.15 Disk Drives
12.15.1 Floppy Drives
12.15.2 Hard Drives
12.15.3 RAID Systems
12.15.4 Zip and Other Floptical Drives
12.15.5 Optical Drives
12.15.6 CD-ROM, CD-R, CR-R/W, DVD, DVD-R, DVD-RAM, and DVD-R/W Drives
12.16 Tape Drives
12.17 Flash Storage
12.18 RAM Disks and Semiconductor Disks
12.19 SCSI Devices and Controllers
12.20 The IDE/ATA Interface
12.21 File Systems on Mass Storage Devices
12.21.1 Maintaining Files Using a Free-Space Bitmap
12.21.2 File Allocation Tables
12.21.3 List-of-Blocks File Organization
12.22 Writing Software That Manipulates Data on a Mass Storage Device
12.22.1 File Access Performance
12.22.2 Synchronous and Asynchronous I/O
12.22.3 The Implications of I/O Type
12.22.4 Memory-Mapped Files
12.23 The Universal Serial Bus (USB)
12.23.1 USB Design
12.23.2 USB Performance
12.23.3 Types of USB Transmissions
12.23.4 USB Device Drivers
12.24 Mice, Trackpads, and Other Pointing Devices
12.25 Joysticks and Game Controllers
12.26 Sound Cards
12.26.1 How Audio Interface Peripherals Produce Sound
12.26.2 The Audio and MIDI File Formats
12.26.3 Programming Audio Devices
12.27 For More Information
13. Thinking Low-Level, Writing High-Level
A. ASCII Character Set
Index
Copyright
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