[Chapman & Hall/CRC Textbooks in Computing 01] • Computer Systems Architecture by Yadin, Aharon -- Read -- Imperial Library of Trantor

Index

Cover Half Title Title Page Copyright Page Table of Contents Preface Author CHAPTER 1 ■ INTRODUCTION AND HISTORIC PERSPECTIVE

INTRODUCTION AND HISTORIC PERSPECTIVE

The First Computers Attributes of the First Computers Von Neumann Architecture Computers’ Evolution Moore’s Law Classification of Computers Historic Perspective Personal Computers Computer Networks 1970s Computers: The First Mainframes 1980s Computers: The Last Mainframes “The Network Is the Computer” Network Computers Computing Attributes Terminal Services Client/Server

File Server Client/Server

Additional “Computers” Key Takeaway

REFERENCES

CHAPTER 2 ■ DATA REPRESENTATION

DATA REPRESENTATION

Numerical Systems Decimal Numbering System Other Numbering Systems Binary System Representing Real Numbers Converting Natural Numbers Converting Fractions

Explanation

Negative Numbers Representation Range of Numbers Computer’s Arithmetic Additions and Subtractions Floating Point Scientific Notation

THE 754 STANDARD

Range of Floating-Point Numbers Special Numbers Converting 754 Numbers Adding Floating-Point Numbers Multiplying Floating-Point Numbers Decimal Numbers Representations Key Takeaway

CHAPTER 3 ■ HARDWARE ARCHITECTURE

HARDWARE ARCHITECTURE

Computer Generations Computer Classification Computer Systems Processor Key Takeaway

REFERENCES

CHAPTER 4 ■ CENTRAL PROCESSING UNIT

PART I: CENTRAL PROCESSING UNIT

Registers Stack-Based Architecture Accumulator-Based Architecture Memory–Register Architecture Register–Register Architecture Architecture Summary Processor Paths Instructions Execution Performance Processor’s Internal Clock “Iron Law” of Processor Performance

CYCLES PER INSTRUCTION-BASED METRIC

Performance Estimation Benchmark Programs Calculating and Presenting the Results Obtained Key Takeaway

PART II: CENTRAL PROCESSING UNIT

Amdahl’s Law Processors’ Types CISC Technology RISC Technology

CISC versus RISC

Instruction-Level Parallelism Instruction-Level Parallelism Problems Instruction-Level Parallelism Hazards Data Hazards Resources’ Access Conflicts Hazards Dynamic Scheduling Scoreboarding Performance Enhancements Branch Prediction Loop Buffer Key Takeaway

CHAPTER 5 ■ MEMORY

MEMORY

Memory Sizes Memory Organization

Explanation

Running Programs Estimating the Processor’s Utilization Partitions Virtual Memory Paging Segments Swap Memory Performance Memory Organization Memory Technologies Key Takeaway

CHAPTER 6 ■ CACHE MEMORY

CACHE MEMORY

Hit Rate Miss Penalty Address Translation Multiple Processor Architectures Key Takeaway

CHAPTER 7 ■ BUS

BUS

Bus Principle Bus Evolution Hard Drive Buses Serial Bus Extending the Bus Concept Bus Expansion beyond the System Boundaries Reliability Aspects Hamming Codes Key Takeaway

CHAPTER 8 ■ INPUT AND OUTPUT

INPUT AND OUTPUT

Methods for Performing I/O Operating System Considerations I/O Buffering I/O and Performance Key Takeaway

CHAPTER 9 ■ STORAGE

MASS STORAGE

Storage Devices Disk Structure Disk Speed Disk Capacity Performance Enhancements Solid-State Disk (SSD) Access Algorithms Disk Controller Redundant Array of Inexpensive Disks Storage Attached Network (SAN) Network Attached Storage (NAS) Key Takeaway

CHAPTER 10 ■ ADDITIONAL ARCHITECTURES

ADDITIONAL ARCHITECTURES

Computer Classification Grid Computing Service-Oriented Architecture Web Services Cloud Computing Virtualization Key Takeaway

CHAPTER 11 ■ SOFTWARE ARCHITECTURES

SOFTWARE ARCHITECTURES

Software Architecture Prearchitectural Era Client/Server Architecture Peer-to-Peer (P2P) Architecture Layered Architecture Tier Architecture Object-Oriented Architecture Service-Oriented Architecture CORBA: Common Object Request Broker Architecture Component Object Model (COM) and Distributed COM (DCOM) Java RMI and Java Beans Java 2 Enterprise Edition Aspect-Oriented Architecture Additional Architectures Key Takeaway

REFERENCES

BIBLIOGRAPHY GLOSSARY INDEX

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