Electronic Systems by Zappa, Franco -- Read -- Imperial Library of Trantor

Index

Title Page Copyright Summary Index Acknowledgments 1. Operational Amplifiers

1.1. Amplifier Stages 1.2. Differential Amplifiers 1.3. Feedback

1.3.1. Invention of the Feedback 1.3.2. Properties of Ideal Feedback Circuits 1.3.3. Negative and Positive Feedbacks 1.3.4. Effect of the Feedback on the Bandwidth

1.4. Operational Amplifier (OpAmp)

1.4.1. Parameters of the Ideal OpAmp 1.4.2. Parameters of the Real OpAmp 1.4.3. Open Loop Frequency Characteristics of an OpAmp 1.4.4. Internal Architecture of the OpAmp 1.4.5. Compensated and Non-Compensated OpAmps 1.4.6. Stability of Non-Compensated and Decompensated OpAmps

1.5. Consequences of Feedback on OpAmps

1.5.1. OpAmp in Inverting Configuration 1.5.2. OpAmp in Non-Inverting Configuration 1.5.3. Variation of Resistances of the Stage 1.5.4. Variation in the Frequency Response of the Stage

1.6. Response to “Large Signal”

1.6.1. Origin of the Slew-Rate

1.7. Response to “Small Signal”

1.7.1. Settling time

1.8. Electrical Characteristics

1.8.1. Compensation of the Bias Current 1.8.2. Compensation of the Voltage Offset Vos

1.9. Power Supply 1.10. Output Currents 1.11. Exercises

2. Circuits with OpAmps

2.1. Linear Circuits with OpAmps

2.1.1. Inverting stage 2.1.2. Non-inverting stage 2.1.3. Inverting Adder 2.1.4. Subtractor (difference amplifier) 2.1.5. Instrumentation Amplifier

2.2. Integrators and Derivators

2.2.1. Ideal Integrator 2.2.2. Real integrator 2.2.3. Ideal derivator 2.2.4. Real derivator

2.3. Current and Voltage Converters

2.3.1. Current-Voltage Converter 2.3.2. Voltage-Current Converter

2.4. Voltage Reference 2.5. Filters 2.6. First Order Active Filters

2.6.1. Inverting integrator 2.6.2. Low-pass filter with finite gain 2.6.3. High-pass filter with finite gain 2.6.4. Band-pass filter 2.6.5. Phase Shifter

2.7. Butterworth Filters

2.7.1. First order low-pass Butterworth filter 2.7.2. Second order low-pass Butterworth filter 2.7.3. Nth order low-pass Butterworth filters 2.7.4. High-pass, Band-pass and notch Butterworth filters

2.8. Chebyschev Filters 2.9. Bessel Filters 2.10. Elliptical Filters (Cauer) 2.11. Exercises: linear circuits with OpAmp 2.12. Non Linear Circuits with OpAmps

2.12.1. Precision rectifier (Super Diode) 2.12.2. Half-wave rectifier 2.12.3. Full-wave rectifier

2.13. Comparators

2.13.1. Zero-crossing detector 2.13.2. Level detector 2.13.3. Window comparator

2.14. Schmitt Trigger with Hysteresis

2.14.1. Inverting Schmitt Trigger 2.14.2. Non-inverting Schmitt Trigger 2.14.3. Comparison between Trigger and Comparator

2.15. Waveform Generators

2.15.1. Sinusoidal Oscillators 2.15.2. Phase-shift oscillator 2.15.3. Wien bridge oscillator 2.15.4. Three-points oscillators 2.15.5. Astable multivibrator 2.15.6. Rectangular pulse generator (monostable multivibrator) 2.15.7. Triangular signal generator

2.16. Exercises

3. Frequency compensation

3.1. Frequency Response 3.2. “Internal” OpAmp Compensation

3.2.1. Dominant-Pole Compensation (Direct and Miller Compensation) 3.2.2. Pole-Zero Compensation 3.2.3. Two-Pole Compensation 3.2.4. Feedforward Compensation

3.3. “External” Compensation of OpAmps

3.3.1. Non-Inverting Configuration 3.3.2. Stability Criteria 3.3.3. Boundary Condition of PM=45° 3.3.4. Inverting Configuration

3.4. Effect of the Feedback Capacitance

3.4.1. Non-Inverting Configuration 3.4.2. Invertenting Configuration 3.4.3. Integrator 3.4.4. Derivator

3.5. Effect of the Input Capacitance

3.5.1. Example 1 3.5.2. Example 2 3.5.3. Compensation of an Inverting Buffer 3.5.4. Compensation of a Photodiode Amplifier

3.6. Effect of Output Resistance and Load Capacitance 3.7. Negative Feedback Compensation

3.7.1. Example 1 3.7.2. Example 2

3.8. Positive Feedback Compensation 3.9. Feedback Advance Compensation

4. Advanced OpAmps

4.1. Instrumentation Amplifier (INA)

4.1.1. Differential amplifier 4.1.2. Instrumentation amplifier 4.1.3. Auto zeroing 4.1.4. INA: usage examples

4.2. Isolation Amplifiers (ISO)

4.2.1. Introduction 4.2.2. Optical Coupling 4.2.3. Transformer Isolation 4.2.4. Capacitive coupling

4.3. Current Feedback Amplifier (CFA)

4.3.1. Voltage-Mode and Current-Mode approaches 4.3.2. Current Feedback Amplifier 4.3.3. CFA principle scheme Actual CFA structure 4.3.4. CFA drawbacks

4.4. Current Mode Amplifier (NORTON)

4.4.1. Current Amplifier Input Stage 4.4.2. Gilbert Cell 4.4.3. Current Amplifier

4.5. Operational Transconductance Amplifier (OTA)

4.5.1. Generalities 4.5.2. Applications

4.6. Data-Sheets

5. Exercises on OpAmps 6. Sampling circuits

6.1. Sampling Theorem 6.2. Hints on Sampling

6.2.1. Aliasing 6.2.2. Anti-aliasing filtering 6.2.3. Windowing for the spectrum computation

6.3. Sample and Hold 6.4. S&H Accuracy and Speed

6.4.1. Charge-injection induced offset or pedestal error 6.4.2. Aperture-induced non-linearity 6.4.3. Signal feed-through 6.4.4. Droop 6.4.5. Buffer-induced non-linearity 6.4.6. Aperture delay time 6.4.7. Aperture time jitter 6.4.8. Acquisition time

6.5. Simulation Examples 6.6. Improved S&H 6.7. Feedback Structures 6.8. Digital Potentiometer 6.9. Analog Multiplexers 6.10. Universal Active Filters 6.11. Exercises

7. DAC converters

7.1. General Characteristics 7.2. Quality Factors 7.3. Architectures

7.3.1. Weighted R DAC 7.3.2. DAC voltage scaling 7.3.3. Serial DAC

7.4. Static Errors and Non-Linearity

7.4.1. Offset and Gain Errors 7.4.2. Integral Non-Linearity INL and Differential Non-Linearity DNL 7.4.3. Monotonicity 7.4.4. Thermal Drifts 7.4.5. Output Impedance

7.5. Signal to Noise Ratio

7.5.1. Quantization Error 7.5.2. Theoretical Signal to Noise Ratio, SNR 7.5.3. Signal to Noise and Distortion Ratio, SiNAD 7.5.4. Harmonic Distortion

7.6. Dynamic Parameters

7.6.1. Settling Time 7.6.2. Glitch

7.7. Example 7.8. Exercises

8. ADC converters

8.1. Generalities 8.2. Static Characteristics

8.2.1. Quantization Error 8.2.2. Non-Linear Quantizator 8.2.3. Offset and Gain Errors 8.2.4. Non-Linearity Errors

8.3. ADC Classification 8.4. Architecture of Various ADCs

8.4.1. Flash ADC 8.4.2. Staircase Tracking ADC 8.4.3. Tracking ADC 8.4.4. Single-Slope ADC, Single Ramp 8.4.5. Double Ramp ADC 8.4.6. Successive approximation ADC (SAR)

8.5. Quality Factors 8.6. Timings 8.7. Dynamic Characteristics

8.7.1. Dynamics 8.7.2. Signal to Noise Ratio 8.7.3. Effective Bits and ENOB 8.7.4. Spectral Performance 8.7.5. SFDR and SiNAD 8.7.6. THD and IMD

8.8. Requirements for Driving the ADC 8.9. Commercial ADCs

8.9.1. Examples of ADCs

8.10. Dithering 8.11. Examples

8.11.1. Choice A 8.11.2. Choice B 8.11.3. Choice C 8.11.4. Choice D

8.12. Exercises

9. Advanced ADCs

9.1. Interpolating FLASH 9.2. FLASH Folding 9.3. Half-Flash Converter

9.1. Multistep flash

9.4. Pipeline Converters 9.5. Successive Approximations Converters

9.1. Charge redistribution ADC

9.6. Time-Interleaved Converters 9.7. Integration Converters

9.1. Double ramp ADC 9.2. Charge balancing ADCs

10. Oversampling and ΣΔ

10.1. Under-sampling

10.1.1. Under-sampling Applications

10.2. Over-Sampling 10.3. ΣΔ Modulator 10.4. II order ΣΔ modulator 10.5. ΣΔ Problems

10.5.1. Pattern Noise 10.5.2. “Dead zone” or “Idle channel”

10.6. Digital Filtering

10.6.1. FIR 10.6.2. IIR

10.7. Commercial ΣΔ

10.7.1. PCM1760 e DF1760 10.7.2. CS5322 and CS5323 10.7.3. CS5317 10.7.4. ΣΔ application example

11. Exercises on converters 12. Microcontrollers

12.1. Internal Architecture 12.2. μC Development Systems 12.3. Program Memory 12.4. Data Memory 12.5. Assembler Instructions

12.5.1. Data address 12.5.2. Instruction cycle

12.6. I/O Ports

12.6.1. Configtion Registers 12.6.2. Input/Output in the internal peripherals 12.6.3. Interrupt Inputs

12.7. Interrupt Management 12.8. ADC Converter

12.8.1. Errors and Conversion Timing 12.8.2. Configuration registers 12.8.3. Performance 12.8.4. Comparator or Analog Watchdog

12.9. DAC Converter 12.10. Exemple of use of I/O 12.11. Timer and Counter

12.11.1. Timing 12.11.2. Watchdog 12.11.3. Pulse-Width Modulation

12.12. Serial Comunication Devices

12.12.1. Syncronous Serial Port SPI 12.12.2. Syncronous Serial Port I2C 12.12.3. USART port

12.13. Oscillator 12.14. Reset 12.15. Sleep-Mode 12.16. Short Review

12.16.1. STMicroelectronics 12.16.2. Motorola 12.16.3. Intel

12.17. Eercises

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