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Index
Chapter 1: Basic Computing Concepts
Chapter 2: The Mechanics of Program Execution
Chapter 3: Pipelined Execution
Chapter 4: Superscalar Execution
Chapter 5: The Intel Pentium and Pentium Pro
Chapter 6: PowerPC Processors: 600 Series, 700 Series, and 7400
Chapter 7: Intel’s Pentium 4 vs. Motorola’s G4e: Approaches and Design Philosophies
Chapter 8: Intel’s Pentium 4 vs. Motorola’s G4e: The Back End
Chapter 9: 64-Bit Computing and x
Chapter 10: The G5: IBM’s PowerPC 970
Chapter 11: Understanding Caching and Performance
Chapter 12: Intel’s Pentium M, Core Duo, and Core 2 Duo
PREFACE
ACKNOWLEDGMENTS
INTRODUCTION
The Calculator Model of Computing ..................................................................
The File-Clerk Model of Computing ..................................................................
The Stored-Program Computer ...................................................................... 4
Refining the File-Clerk Model ......................................................................
The Register File ..................................................................................
RAM: When Registers Alone Won’t Cut It .............................................................
The File-Clerk Model Revisited and Expanded ................................................. 9
An Example: Adding Two Numbers ............................................................. 10
A Closer Look at the Code Stream: The Program ......................................................
The DLW-1’s Basic Architecture and Arithmetic Instruction Format .................... 12
A Closer Look at Memory Accesses: Register vs. Immediate ......................................... 1
Register-Relative Addressing .......................................................................
Machine Language on the DLW-1 ............................................................... 20
Binary Encoding of Arithmetic Instructions .................................................... 21
Binary Encoding of Memory Access Instructions ............................................ 23
Translating an Example Program into Machine Language ............................... 25
The Programming Model and the ISA ..................................................................
The Instruction Fetch: Loading the Instruction Register ..................................... 28
The Clock ..........................................................................................
Branch Instructions ................................................................................
Excursus: Booting Up ...............................................................................
The Lifecycle of an Instruction ....................................................................
Basic Instruction Flow .............................................................................
Pipelining Explained ...............................................................................
Applying the Analogy ...............................................................................
A Pipelined Processor ..............................................................................
The Speedup from Pipelining ...................................................................... 4
Program Execution Time and Completion Rate .............................................. 51
The Relationship Between Completion Rate and Program Execution Time ......... 52
Instruction Throughput and Pipeline Stalls ..................................................... 53
Instruction Latency and Pipeline Stalls .......................................................... 5
Limits to Pipelining ...............................................................................
Superscalar Computing and IPC ......................................................................
Expanding Superscalar Processing with Execution Units ..............................................
Basic Number Formats and Computer Arithmetic ........................................... 66
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