Bebop to the Boolean Boogie, 3rd Edition by Maxfield, Clive -- Read -- Imperial Library of Trantor

Index

Brief Table of Contents Table of Contents Copyright Page Dedication Foreword About this Book Acknowledgments About the Author Part I. Fundamentals

Chapter 1. Analog Versus Digital

It was a dark and stormy night… Analog versus digital views of the world Multi-value digital systems Experiments with bricks

Chapter 2. Atoms, Molecules, and Crystals

Protons, Neutrons, and Electrons Quantum Levels and Electron Shells Making Molecules Crystals and Other Structures

Chapter 3. Conductors, Insulators, and Other Stuff

Conductors and Insulators Voltage, Current, and Resistance Resistance and Resistors Capacitance and Capacitors Inductance and Inductors Memristance and Memristors Impedance and Reactance Admittance, Conductance, and Susceptance Unit Qualifiers

Chapter 4. Semiconductors (Diodes and Transistors)

Herding Wild Electrons The Electromechanical Relay The First Vacuum Tubes Semiconductors Semiconductor Diodes Bipolar Junction Transistors (BJTs) Metal-Oxide Semiconductor Field-Effect Transistors (MOSFETs) The Transistor as a Switch Gallium Arsenide Semiconductors Light-Emitting Diodes (LEDs) Organic LEDs (OLEDs) Active Versus Passive and Electric Versus Electronic

Chapter 5. Primitive Logic Functions

Switch Representations of AND and OR Functions FALSE and True Versus OPEN and CLOSED BUF and NOT Functions “Connect the NOTs” AND, OR, and XOR Functions NAND, NOR, and XNOR Functions Not a Lot Functions Versus Gates

Chapter 6. Using Transistors to Build Logic Gates

NMOS, PMOS, and CMOS Using os and 1s Instead of Fs and Ts NOT and BUF Gates NAND and AND Gates NOR and OR Gates XNOR and XOR Gates XNOR and XOR Gates: Pass-Transistor Implementations Pass-Transistor Logic

Chapter 7. Alternative Number Systems

Fingers, Toes, and Pebbles Bones with Notches Tally Sticks: The Hidden Dangers The Abacus Roman Numerals Decimal (Base-10) Duo-Decimal (Base-12) Sexagesimal (Base-60) The Concepts of Zero and Negative Numbers Vigesimal (Base-20) Jobs Abound for Time-Travelers Quinary (Base Five) Binary (Base-2) Octal (Base-8) and Hexadecimal (Base-16) Way Back in the Mists of Time Representing Numbers Using Powers Lucky and Unlucky Numbers Tertiary Logic

Chapter 8. Binary Arithmetic

Before We Start …. Unsigned Binary Numbers Adding Unsigned Binary Numbers Nines’ and Ten’s Complements Subtracting Unsigned Binary Numbers Sign-Magnitude Binary Numbers Signed Binary Numbers Adding Signed Binary Numbers Subtracting Signed Binary Numbers Binary Multiplication Binary Division

Chapter 9. Boolean Algebra

Cabbages, Parrots, and Buckets of Burning Oil Primitive Logic Functions Combining a Single Variable With Logic 0 or Logic 1 The Idempotent Rules The Complementary Rules The Involution Rule The Commutative Rules The Associative Rules Precedence of Operators The First Distributive Rule The Second Distributive Rule The Simplification Rules DeMorgan Transformations Minterms and Maxterms Sum-of-Products and Product-of-Sums Canonical Forms An Interesting Conundrum

Chapter 10. Karnaugh Maps

The Tree of Porphyry John Venn and his Venn Diagrams Allan Marquand and Lewis Carroll Maurice Karnaugh and Karnaugh Maps Minimization using Karnaugh Maps Grouping Minterms Incompletely Specified Functions Populating Maps using Os Versus 1 s

Chapter 11. Slightly More Complex Functions

First gather a bucket of logic gates Scalar versus vector notation Equality comparators Multiplexers Decoders Tri-state functions Combinational versus sequential functions RS latch (NOR implementation) RS latch (NAND implementation) D-type latches D-type flip-flops Implementing a D-type flip-flop JK and T flip-flops Shift registers Counters Setup and hold times Brick by brick

Chapter 12. State Machines

“Is That a Gizmo in Your Pocket, Or …” State Diagrams State Tables State Machines State Assignment Don't Care States, Unused States, and Latch-Up Conditions

Chapter 13. Analog-to-Digital and Vice Versa

Setting the scene Analog-to-digital Digital-to-analog DSP versus DSP Analog signal processing (ASP) Digital signal processing (DSP) DSP Examples What implements the digital signal processing?

Part II. Components and Processes

Chapter 14. Integrated Circuits (ICs)

The first integrated circuits An overview of the fabrication process A slightly more detailed look at the fabrication process An introduction to the packaging process Integrated circuits versus discrete components Different types of ICs TTL, ECL, and CMOS Core supply voltages Equivalent gates Device geometries What comes after optical lithography? How many transistors? Moore’s law

Chapter 15. Memory ICs

RAMs and ROMs Cells, words, and arrays Addressing a word in memory Kilo, Mega, Giga, Tera, Etc. Bits and bytes ROM control decoding RAM with separate data in and data out busses RAM with single bidirectional bus Increasing width and depth Mask-programmed ROMs PROMs EPROMs EEPROMs/E2PROMS Flash SRAMs and DRAMs SDRAMs DDR, DDR2, DDR3, QDR, RAMBUS, Etc. SIMMs, DIMMs, and RIMMs ECC memory MRAMs nvRAMs, FRAMs, PRAMs, RRAMs, CBRAMs, SONOS, Etc.

Chapter 16. Programmable ICs

A simple programmable function Fusible-link technologies Antifuse technologies EPROM, E2PROM, FLASH, and SRAM Technologies The first programmable logic devices (PLDs) PROMs PLAs PALs and GALs Additional programmable options Introducing CPLDs Introducing FPGAs Alternative FPGA architectures Alternative FPGA configuration technologies Mixed-Signal FPGAs, CSSPs, and …

Chapter 17. Application-Specific Integrated Circuits (ASICs)

Introducing ASICs Full Custom Devices Gate Arrays High-Level View of the Gate ArrayDesign Flow Standard Cell Devices High-Level View of the Standard CellDesign Flow 1T Versus 6T SRAM Structured ASICs Input/Output (I/O) Cells and Pads ASICs Versus ASSPs Who Are All the Players? Summary

Chapter 18. Printed Circuit Boards (PCBs)

Not Much Fun The First Circuit Boards PCBs and PWBs RoHS and Lead-Free Solder Subtractive Processes Additive Processes Single-Sided Boards Lead Through-Hole (LTH) Wave Soldering Surface Mount Technology (SMT) Double-Sided Boards Holes Versus Vias Multilayer Boards Through-Hole, Blind, and Buried Vias Power and Ground Planes High Density Interconnect (HDI) and Microvia Technologies Backplanes and Motherboards Conductive Ink Technology Chip-on-Board (COB) Flexible Printed Circuits (FPCs)

Chapter 19. Hybrids

The Offspring Resulting From Crossbreeding Hybrid Substrates The Thick-Film Process The Thin-Film Process The Packaging Process

Chapter 20. Advanced Packaging Techniques

Sliding down the rabbit hole Wire bonds versus flip-chip Wire bonding and Flip-chip Chip-scale package (CSP) technology 3-D Die stacking System-in-package (SiP), PiP, and PoP A positive plethora of substrates An example SiP based on cofired ceramics The mind boggles

Chapter 21. Alternative and Future Technologies

A Smorgasbord of Technologies Reconfigurable Computing Elemental Computing Arrays (ECAs) Optical Interconnect Optical Memories Protein Switches and Memories Electromagnetic Transistor Fabrication Heterojunction Transistors Buckyballs and Nanotubes Diamond Substrates Conductive Adhesives Superconductors Nanotechnology Once Again, the Mind Boggles Summary

Part III. Design Tools and Stuff

Chapter 22. General Concepts

Stuff, More Stuff, and Yet More Stuff The Origins of EDA Automation Embedded Systems Programming Versus Hardware Design Languages Netlists Different Levels of Abstraction Different Languages Electronic System Level (ESL)

Chapter 23. Design and Verification Tools

Weasel Words Design Capture Functional Verification (Simulation) Formal Verification Logic Synthesis Layout (Place-and-Route) Parasitic Extraction Timing Analysis Design for Manufacturability (DFT) And So Much More … Turn That Frown Upside Down

Appendix A. Assertion-Level Logic

Beware—Here Be Dragons! Standard versus Assertion-Level Logic Did Someone Just Shriek?

Appendix B. Positive Versus Negative Logic

Are You Positive About That? Physical to Logical Mapping (NMOS Logic) Physical to Logical Mapping (PMOS Logic)

Appendix C. Reed-Müller Logic

“But That’s Not Logical, Captain!”

Appendix D. Gray Codes

Gray, But Not Gloomy Generating a Gray Code Binary-to-Gray and Gray-to-Binary It’s too Noisy in Here! Actually Generating a Gray Code Generating Sub-2n Sequences Generating Sub-2n Sequences with Consecutive Values

Appendix E. Linear Feedback Shift Registers (LFSRs)

The ouroboros of the digital consciousness Many-to-one implementations More taps than you know what to do with One-to-many implementations Seeding an LFSR FIFO applications Modifying LFSRs to sequence 2n values Accessing an LFSR’s previous value Encryption and decryption applications Cyclic redundancy check (CRC) applications Data compression applications Built-in self-test (BIST) applications Pseudo-random number applications Last but not least

Appendix F. Pass-Transistor Logic

“Would you pass the logic, please?”

Appendix G. More on Semiconductors

P-N junctions, depletion zones, and diodes Junction FETs (JFETs) and MESFETs Depletion-mode MOSFETs Enhancement-mode MOSFETs

Appendix H. Rounding Algorithms 101

Introduction Round-Half-Up (Arithmetic Rounding) Round-half-down Round-half-even (banker’s rounding) Round-half-odd Round-ceiling (toward positive infinity) Round-floor (toward negative infinity) Round-toward-zero Round-away-from-zero Round-up Round-down Truncation (chopping) Round-alternate Round-random (stochastic rounding) Rounding sign-magnitude binary values Rounding signed binary values Summary

Appendix I. An Interesting Conundrum

Inverting three signals using only two NOT gates

Appendix J. A No-Holds Barred Seafood Gumbo

Downhill mud-wrestling Ingredients Step-by-step instructions Serving your gorgeous gourmet gumbo

Glossary Glossary Index

SYMBOL A B C D E F G H I J K L M N O P Q R S T U V W X Y

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