Computer Architecture by Hennessy, John L.,. Patterson, David A. -- Read -- Imperial Library of Trantor

Index

Cover image Title page Table of Contents In Praise of Computer Architecture: A Quantitative Approach Fifth Edition Copyright Dedication Foreword Preface

Why We Wrote This Book This Edition Topic Selection and Organization An Overview of the Content Navigating the Text Chapter Structure Case Studies with Exercises Supplemental Materials Helping Improve This Book Concluding Remarks

Acknowledgments

Contributors to the Fifth Edition Contributors to Previous Editions

1. Fundamentals of Quantitative Design and Analysis

1.1 Introduction 1.2 Classes of Computers 1.3 Defining Computer Architecture 1.4 Trends in Technology 1.5 Trends in Power and Energy in Integrated Circuits 1.6 Trends in Cost 1.7 Dependability 1.8 Measuring, Reporting, and Summarizing Performance 1.9 Quantitative Principles of Computer Design 1.10 Putting It All Together: Performance, Price, and Power 1.11 Fallacies and Pitfalls 1.12 Concluding Remarks 1.13 Historical Perspectives and References Case Studies and Exercises by Diana Franklin

2. Memory Hierarchy Design

3. Instruction-Level Parallelism and Its Exploitation

4. Data-Level Parallelism in Vector, SIMD, and GPU Architectures

4.1 Introduction 4.2 Vector Architecture 4.3 SIMD Instruction Set Extensions for Multimedia 4.4 Graphics Processing Units 4.5 Detecting and Enhancing Loop-Level Parallelism 4.6 Crosscutting Issues 4.7 Putting It All Together: Mobile versus Server GPUs and Tesla versus Core i7 4.8 Fallacies and Pitfalls 4.9 Concluding Remarks 4.10 Historical Perspective and References Case Study and Exercises by Jason D. Bakos

5. Thread-Level Parallelism

5.1 Introduction 5.2 Centralized Shared-Memory Architectures 5.3 Performance of Symmetric Shared-Memory Multiprocessors 5.4 Distributed Shared-Memory and Directory-Based Coherence 5.5 Synchronization: The Basics 5.6 Models of Memory Consistency: An Introduction 5.7 Crosscutting Issues 5.8 Putting It All Together: Multicore Processors and Their Performance 5.9 Fallacies and Pitfalls 5.10 Concluding Remarks 5.11 Historical Perspectives and References Case Studies and Exercises by Amr Zaky and David A. Wood

6. Warehouse-Scale Computers to Exploit Request-Level and Data-Level Parallelism

6.1 Introduction 6.2 Programming Models and Workloads for Warehouse-Scale Computers 6.3 Computer Architecture of Warehouse-Scale Computers 6.4 Physical Infrastructure and Costs of Warehouse-Scale Computers 6.5 Cloud Computing: The Return of Utility Computing 6.6 Crosscutting Issues 6.7 Putting It All Together: A Google Warehouse-Scale Computer 6.8 Fallacies and Pitfalls 6.9 Concluding Remarks 6.10 Historical Perspectives and References Case Studies and Exercises by Parthasarathy Ranganathan

A. Instruction Set Principles

A.1 Introduction A.2 Classifying Instruction Set Architectures A.3 Memory Addressing A.4 Type and Size of Operands A.5 Operations in the Instruction Set A.6 Instructions for Control Flow A.7 Encoding an Instruction Set A.8 Crosscutting Issues: The Role of Compilers A.9 Putting It All Together: The MIPS Architecture A.10 Fallacies and Pitfalls A.11 Concluding Remarks A.12 Historical Perspective and References Exercises by Gregory D. Peterson

B. Review of Memory Hierarchy

B.1 Introduction B.2 Cache Performance B.3 Six Basic Cache Optimizations B.4 Virtual Memory B.5 Protection and Examples of Virtual Memory B.6 Fallacies and Pitfalls B.7 Concluding Remarks B.1 Historical Perspective and References Exercises by Amr Zaky

C. Pipelining: Basic and Intermediate Concepts

C.1 Introduction C.2 The Major Hurdle of Pipelining—Pipeline Hazards C.3 How Is Pipelining Implemented? C.4 What Makes Pipelining Hard to Implement? C.5 Extending the MIPS Pipeline to Handle Multicycle Operations C.6 Putting It All Together: The MIPS R4000 Pipeline C.7 Crosscutting Issues C.8 Fallacies and Pitfalls C.9 Concluding Remarks C.10 Historical Perspective and References Updated Exercises by Diana Franklin

Index Translation between GPU terms in book and official NVIDIA and OpenCL terms