Index
Page numbers followed by f indicates a figure and t indicates a table.
A
Active rangefinding approach,
286
Adaptive differential pulse code modulation (ADPCM),
361
Address,
58,
66,
82,
118,
161,
172,
230,
233,
358,
423
range, for PIC16F microprocessor,
73
spaces, in TMS320C55x,
81f
Advanced configuration and power interface (ACPI),
351–352
Airplanes, distributed computing in,
419–422
Alarm clock, system design
component design and testing,
200
system integration and testing,
200
Allocating processes, on distributed embedded systems,
438–441
AMBA high-performance bus (AHB),
171
AMBA peripherals bus (APB),
172
Analog physical objects, in train control system,
35f
Anti-lock braking system (ABS),
4,
419,
420
Application interface,
425
Application-specific integrated circuits (ASIC),
386
AR indirect addressing,
82
Arithmetic expression,
238
address translation,
127f
AMBA bus system, elements of,
171f
assembly language, example of,
54,
55f
data processing instruction, format of,
54,
55,
55f
execution time of for loop,
131
and memory organization,
58
condition codes in,
66,
67f
flow of control in,
66–72
programming model,
59,
59f
ARM Procedure Call Standard (APCS),
71
Assembly source code,
230
Asynchronous interrupts,
113
Audio
playback, state diagram for,
203,
205f
Audio player, system design
component design and testing,
206
system integration and debugging,
206
Automatic stability control system,
4
engine controllers,
4,
311
Automotive engine control,
310
Auxiliary data pointer registers,
79
Average-case execution time,
255,
348
B
Backup flight control system (BFS),
314
and memory access times,
191
Base-plus-offset addressing,
65,
68
intellectual property,
179
Best-case execution time,
255
Big-endian mode,
vs. little-endian mode,
54,
58f
Black-and-white display,
23
Block motion search parameters,
444f
Block repeat registers,
79
BMW 850i, microprocessors used in,
4
times and data volumes in,
190f
disconnected transfers,
166
state diagrams for read transaction,
166,
167f
transfers, times and data volumes in,
190f
with DMA controller,
168f
Bus-based system, performance bottlenecks in,
188,
192
organizations, within ARM word,
58f,
60
C
C programming language
assignments, in ARM instructions,
64
direct-mapped
vs. set-associative,
121
microprocessor architectures,
116
Capability maturity model (CMM),
403–404
Carrier Sense Multiple Access with Arbitration on Message Priority (CSMA/AMP),
417
Carrier Sense Multiple Access with Collision Detection (CSMA/CD),
427,
427f
CDP indirect addressing,
83
Central processing unit (CPU),
54
internal registers of,
52
Certification process,
421
Classes, responsibilities and collaborators (CRC) cards,
396–400,
397f,
418
Clear-box testing
control/data flow graph,
271
Coding
Coefficient data pointer registers,
79
Coefficient indirect addressing,
83
Coefficient matrix, in zig-zag pattern,
289,
290f
Collision avoidance system (CAS),
394–396
Color
Common intermediate format (CIF),
444
Common object file format (COFF),
233
player, system architecture of,
453,
453f
methods
arithmetic expression,
238
two-dimensional arrays,
245f
optimizations
reservation table, instruction scheduling,
251,
252f
template matching, code generation by,
252,
253f
Complementary metal oxide semiconductor (CMOS), power characteristics,
133
Complex instruction set computers (CISC),
vs. RISC,
53
Computational kernels,
432
Computer architecture taxonomy,
52–54
Computer-aided design (CAD),
339,
383
Concurrent engineering,
386,
388
Condition codes, in ARM,
66,
67f
Consumer electronics devices
functional requirements of,
185
hardware architecture of,
187,
187f
nonfunctional requirements of,
186
Context switching mechanism,
321
Control flow–oriented testing,
275
Controller operate behavior,
41f
Controls activate behavior,
364,
366f
Core processor modules (CPMs),
421
DMA bus transaction on,
168
internal registers of,
52
pipeline
power consumption
static
vs. dynamic power management,
134
Current program status register (CPSR),
60,
114
Current-bit behavior,
140
C55x
and memory organization,
78–80
Cyber-physical considerations,
410
Cyber-physical system,
7–8
Cycle-accurate simulator,
260
Cyclic redundancy check (CRC),
417
D
Data
instructions, in PIC16F microprocessor,
75
in PIC16F microprocessor,
73–76
pointer registers, auxiliary and coefficient,
79
space for PIC16F microprocessor,
74
storage
types in video accelerator,
445,
445f
Data compressor
program design
non–object-oriented implementation,
146
requirements and algorithm,
137–139
Data-dependent program paths,
256–257
Data flow
Decompression module,
367
Definition-use analysis,
276
Dense instruction sets,
270
Design
methodologies
Design rule for Camera File (DCF) standard,
291
Desktop processors, power requirements of,
411
Diamond-shaped nodes,
226
Digital Command Control (DCC),
30–32,
31f
Digital Command Control Communication Standard,
31
Digital Command Control Electrical Standard,
31
Digital media processor,
431
Digital signal processors (DSPs),
51,
53,
56,
72
Digital still camera (DSC),
45
integration and testing,
296
Direct memory access (DMA),
157
request, cyclic scheduling of,
169f
Directed acyclic graph (DAG),
315
vs. set-associative cache,
121
Discrete cosine transform (DCT),
441
Distributed embedded systems,
414
Domain Name Server (DNS),
430
Double in-line memory modules (DIMMs),
174
Dual AR indirect addressing,
83
Dual-kernel approach,
352
Dynamic power management mechanism,
134,
349
Dynamic RAM (DRAM)
Dynamically linked libraries (DLLs),
235,
358
E
8-bit microcontroller,
3,
342
Eight-to-fourteen (EFM) encoding,
452
Electrical interface to I
2C bus,
422,
423f
Electronic control units (ECUs),
414
Embedded computing
multiprocessor system-on-chip for,
413
challenges in design,
8–9
characteristics of applications,
4–5
Embedded programs
components for
circular buffers and stream-oriented programming,
216–221
queues and producer/consumer systems,
221–223
Embedded system
based on computing platform,
176–185
architecture design,
17–19
behavioral description,
25–28
hardware and software components,
19
structural description,
21–25
software layer diagram for,
159,
159f
Energy
vs. power consumption,
133
Engine control unit (ECU)
component design and testing,
373
system
integration and testing,
374
theory of operation and requirements,
369–370
Enhanced modular IO subsystem (eMIOS),
373
Environmental development, embedded systems,
9
Error correction code (ECC),
28,
202
Error correction data byte,
32
Error delimiter field,
418
Exchangeable Image File Format (EXIF),
291,
291f
Executable binary file,
229
External memory interface (EMIF),
89
F
Fast Fourier transform (FFT),
201
Fast interrupt requests (FIQs),
112
Field-programmable gate arrays (FPGAs),
19,
433,
444,
446
File allocation table (FAT),
187
File display/selection, state diagram for,
203,
204f
File Transport Protocol (FTP),
430
Finite impulse response (FIR) filter,
68,
216,
218
on PIC16F microprocessor,
76
Finite-state machine,
214
Floating-point operations,
255
in PIC16F microprocessor,
76–77
Frequency-shift keying (FSK),
280,
281f
Functional tests
G
Generalization relationship, UML,
24
General-purpose computer,
2,
58
Global Interrupt Enable (GIE) bit,
113
Global Positioning System (GPS),
5
Graph
matrix representation of,
274f
H
Hardware abstraction layer (HAL),
159
HD video coprocessor subsystem (HDVICP2),
431
HD video processing subsystem (HDVPSS),
432
Heterogeneous shared memory multiprocessors,
431–432
Hierarchical design flows,
386,
387
High Speed Ethernet (HSE),
429
High-level programming language,
224,
320
High-performance processors,
6
use case of synchronizing with,
186f
for text compression,
138
Hypertext Transport Protocol (HTTP),
430
I
In-circuit emulator (ICE),
182
Input and output (I/O) programming
interrupts
with prioritized interrupts,
110
Input symbols, data compressor,
137
Instruction data byte,
32
Instruction scheduling, reservation table for,
251,
252f
Instruction space, PIC16F microprocessor,
73,
74f
Instruction-level simulator,
260
INT External Interrupt Enable bit,
114
Integrated project management,
387
Intel Strong ARM SA-1100 and SA-1111, system organization of,
158
Intellectual property (IP),
179
Inter-instruction dependencies,
56
Internal consistency of requirements,
14
International Standards Organization (ISO),
402,
414
Interprocess communication mechanisms
shared memory communication,
340–341
Interrupt requests (IRQs),
112
Interrupt service routine (ISR),
345,
347
J
Joint Photographic Experts Group (JPEG) images, compression process for,
288,
288f
L
Large-scale embedded system design,
46
Light-emitting diodes (LEDs),
182
Line replaceable units (LRUs),
421
Little-endian mode
vs. big-endian mode,
54,
58f
Local Interconnect Network (LIN) bus,
419
Lossless compression methods,
287
Lossy compression algorithm,
287
M
Machine-independent optimizations,
237
Manufacturing cost,
5,
12,
14
MAPS_SHARED parameter,
356
Measurement-driven performance analysis,
259–261
Mechanical systems of car,
419
Media Oriented Systems Transport (MOST) bus,
419
Memory
PIC16F microprocessor and,
73
Memory management units (MMUs),
116
and address translation
Memory system mechanisms
cache
direct-mapped
vs. set-associative,
121
memory system performance,
117
microprocessor architectures,
116
Memory-mapped I/O, ARM,
98
Methodological techniques,
280
cyber-physical system,
7–8
Model train controller,
28,
29f
conceptual specification,
32–35
detailed specification,
35–41
Motion estimator, architectures for,
446,
447,
447f
Motor interface class,
35
Motor speed controlling, pulse-width modulation,
36f
Moving map, block diagram for,
17,
17f
MPEG Layer 1
MPEG-2 video compression,
441,
442f
use case for playing,
186f
Multiple inheritance, UML,
24,
24f
Multiple-issue instruction,
54
Multiply instructions,
84
Multiprocessor system-on-chip (MPSoC),
412,
431–441
Multirate communication,
315
N
Nested function calls and stacks,
70,
70f
Nonfunctional requirements,
12,
186,
390
Nonmaskable interrupt (NMI),
109
Non–object-oriented implementation,
146
Nonrecurring engineering (NRE) costs,
12
Nonrepeatable instructions,
85
O
Object-oriented design,
20,
21
Object-oriented modeling language,
20
Object-oriented programming,
21
Object-oriented specification,
20,
21
Objects
One-byte transmissions,
424
One-dimensional array,
244f
Open source platforms,
176
Open Systems Interconnection (OSI) models,
414–415
performance evaluating
process and scheduling states,
316–317
Optical disc technology,
449
Optimization techniques,
214,
236
Outgoing message (OGM),
363
Output pulse width and frequency modulation buffered mode (OPWFMB),
373
Output symbols, data compressor,
137
P
Packet transmission rates,
32
Page pointers, data and peripheral,
79
Panel-activate behavior,
40f
PCI interface, designing of,
449
read/write operation,
100
Performance measures,
255
Performance optimization strategies,
265–266
Peripheral Interrupt Enable (PEIE) bit,
113
Peripheral page pointers,
79
Personal computers (PCs),
7
Physical interface classes,
364
Physical performance measurement,
260
PIC16F882 microcontroller, system organization of,
157
PIC16F microprocessor,
51
and memory organization,
73
flow of control in,
76–77
Playback-msg behaviors,
367f
Pointer registers, auxiliary and coefficient data,
79
read/write operation,
100
real-time scheduling in,
354
Power embedded computing, multiprocessing for,
410
Power management policy,
349,
351
Power supply voltage,
28,
133
Power
vs. energy consumption,
133
Power-down interrupts,
109
Power-managed system,
350f
PowerPC 603, energy efficiency,
134
Primary avionics software system (PASS),
314
Procedure calls, in ARM,
71
Processor interrupt latency,
345
Program execution time,
256,
265
Program generation, compilation,
229f
Program location counter (PLC),
230
Program performance,
43,
255
Program size, analysis and optimization,
270–271
Program-level performance analysis
measurement-driven performance analysis,
259–261
performance measures, types of,
255
program performance, elements of,
256–259
Programmability of microprocessors,
7
performance measures on,
255
Prototyping languages,
405
Pulse-width modulation,
36f
Q
R
Random-access memory,
172
Rate-monotonic analysis (RMA),
326–330
Reachability analysis,
246
Read-only memories (ROMs),
174
Real-time code, timing error in,
183–184
Real-time operating systems (RTOS),
45,
307,
339
preemptive operating system,
319–325
Real-time performance,
410
Record-msg behaviors,
367f
Reduced instruction set computers (RISC)
Register indirect addressing, in ARM,
62,
63f
Registers
Remote transmission request (RTR) bit,
417
Requirements form,
13,
13f
Reservation table, instruction scheduling,
251,
252f
Round-robin scheduling,
325
S
Saved program status register (SPSR),
114–115
Sequence diagram,
27,
28f,
41f,
162f,
293,
295f,
320f,
321f,
345f,
360f,
446f
for control input transmitting,
38f
Serial clock line (SCL),
422
Serial communications program, parameters for,
97
Serial data line (SDL),
422
Servo control algorithms,
452
Shared memory multiprocessors,
431
Shared memory
vs. message passing,
412
Sharpening algorithms,
287
Signal processing algorithms,
279
Simple Mail Transfer Protocol (SMTP),
430
Simple Network Management Protocol (SNMP),
430
Single in-line memory modules (SIMMs),
174
Single repeat registers,
79
Single-chip
Single-instruction multiple-data (SIMD) operations,
72
Single-issue processor,
54
16-bit DSP processor,
204
16-bit microcontroller,
3
Skip-if instructions,
130
Smartphones as platforms,
7
Society of Automotive Engineers (SAE),
373
Software
component design and testing,
283–284
integration and testing,
285
operation and requirements,
280–282
Software performance optimization
Software testing, techniques,
400,
403
Space shuttle software error,
314
Specification languages,
405,
406
Standard data flow graph,
225f
Static power management mechanism,
134
Static scheduling policy,
326
Stream-oriented programming,
216–221
StrongARM SA-1100, power-saving modes,
136
Structural description,
21–25
Successive refinement design methodology,
385,
385f
Superscalar processor,
54,
56
Synchronous channels,
419
Synchronous dynamic RAM (SDRAM),
173,
173f
Synchronous interrupts,
113,
114
System design techniques
control-oriented specification languages,
391–394
system analysis and architecture design, CRC cards,
396–400
System integration,
19–20
System requirements
vs. distributed system,
412
T
Tagged Image File Format (TIFF),
290
Telephone
Telephone answering machine, design
component design and testing,
368
system integration and testing,
368–369
theory of operation and requirements,
361–364
Template matching, code generation by,
252,
253f
Test generation programs,
403
Therac-25 medical imaging system,
401
32-bit RISC microprocessor,
3,
204
TI TMS320DM816x DaVinci,
431
TMR0 Overflow Interrupt Enable bit,
113
Traffic alert and collision avoidance system (TCAS),
394
Train controller commands,
32,
33f
Translation lookaside buffer (TLB),
126
Transmission Control Protocol (TCP),
430
U
multiple inheritance in,
24,
24f
sequence, of DMA transfer,
169f
state and transition in,
26f
state diagram, of bus bridge operation,
171f
Universal Asynchronous Receiver/Transmitter (UART) 8251,
97–98,
341
User Datagram Protocol (UDP),
430
classes for alarm clock,
195f
V
Very large scale integration (VLSI),
2,
6,
410
Very-long instruction word (VLIW) processor,
54,
56–57
Video accelerator
algorithm and requirements,
443–444
von Neumann architectures,
52,
52f
W
Worst-case execution time,
255,
259
Write-through scheme,
119
X
Xilinx Zynq-7000 platform,
434